MCU specification comparison table for four smart watches: including operating frequency, built-in flash memory/SRAM capacity, pin count, IC cost, MCU model, and MCU chip package size. Four smart watches: Carbon Steel Ed. B1 from Basis Science (acquired by Intel), PebbleWatch from Pebble, Toq from Qualcomm, and Galaxy Gear from Samsung.
Why is STMicroelectronics monopolized and won the favor of many smart watch manufacturers? Taking the Pebble smart watch as an example, the STM32F20x series is based on the high-performance ARM® CortexTM-M3 32-bit RISC core operating at up to 120MHz. This series integrates high-speed embedded memory, flash memory and system SRAM capacity up to 1M byte and 128K bytes, up to 4K bytes of backup SRAM, and a large number of connected to 2 APB bus, 2 AHB bus and 1 Enhanced I/O and peripherals for 32-bit multiple AHB bus matrices.
Pebble smart watch with ST STM32F205RE high performance ARM Cortex-M3 MCU
Features:
Kernel: Using the ARM 32-bit CortexTM-M3 CPU, the Adaptive Real-Time Accelerator (ART AcceleratorTM) allows the program to run in zero-wait state when executed in Flash at up to 120MHz. The built-in memory protection unit enables Up to 150DMIPS/1.25DMIPS/MHz (Dhrystone 2.1) performance.
STMicroelectronics also offers a wide range of support for Flash, package pins and SRAM to meet the needs of smart watch manufacturers.
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