The intelligent fetal monitoring system selects the MSC1210 microprocessor with 24-bit A/D converter and strong analog performance and digital processing capability produced by TI. The microprocessor selects, buffers, amplifies, adjusts the gain of the input channel. A/D conversion and digital processing are integrated into a single-chip circuit, and data acquisition of monitoring indicators such as fetal heart rate, contraction pressure, and fetal movement times can be realized with only one integrated circuit, and control of the speech device and the vibrator. The basis of intelligent fetal monitoring is the fetal heart rate. How to accurately and timely obtain the fetal heart rate is the premise of the intelligent fetal monitoring system. For the fetal heart rate Doppler signal has a low signal-to-noise ratio, non-stationary randomness characteristics, the birth rate of 1/2, 2 / 3 and 2 times the heart rate, resulting in control errors, here using wavelet analysis combined with double threshold algorithm Accurate, real-time fetal heart rate, ensuring the effective implementation of intelligent control.
Intelligent computer fetal monitoring system structureThe block diagram of the intelligent computer fetal monitoring system is shown in Figure 1. Mainly by ultrasound Doppler fetal heart probe, uterine contraction probe, fetal movement probe, fetal heart signal conditioning circuit (low-pass filtering, absolute value calculation and envelope extraction, etc.), contraction pressure signal conditioning circuit, voice control, sound oscillator The MSC1210 microprocessor and computer processing system are composed. The MSC1210 and computer processing system are the core.
The MSC1210 controls the collection and communication of monitoring indicators, and receives computer commands to control the voice and sound oscillators. The computer system implements functional modules such as intelligent control, communication control, data processing algorithms, and monitoring display.
Signal conditioning circuitIn view of the importance of fetal heart rate monitoring indicators and the complexity of fetal heart rate Doppler signals, the meristematic circuit of fetal heart rate Doppler signals is highlighted here. The circuit mainly performs pre-processing such as low-pass filtering, absolute value calculation and envelope extraction on the Doppler fetal heart sound signal. The low pass filter uses a second order low pass filter with a cutoff frequency of 250 Hz to filter out high frequency signals and interference. The absolute value operation circuit is shown in Figure 2. The intensity of the signal is doubled, which improves the detection sensitivity. The envelope extraction circuit is shown in Fig. 3. A low-pass filter combining a Che-shaped filter with a cutoff frequency of 10 Hz and a T-shaped filter is used. Parallel diodes and capacitors limit the negative signal in the circuit and dampen high frequency signals in a certain frequency band.
The intelligent fetal monitoring acquisition system adopts the powerful single-chip microcomputer MSC1210 from Texas Instruments as the processor. The MSC1210 chip integrates the precision analog-to-digital converter of 8051 microcontroller and FLASH memory. The chip uses the enhanced 8051 microcontroller core. Shorten the instruction execution cycle, use low-power design, integrate a 24-bit resolution analog-to-digital converter (ADC), convert speed up to 1000HZ, 8-channel multiplexer, analog input channel test current source, Input buffer, programmable gain amplifier (PGA), internal reference, 8-bit microcontroller, program/data flash memory and data SRAM. The digital filter filters the output data. Digital filters are available in fast, sin2 and sin3. The enhanced 8051 core has two data pointers, and its instruction system is fully compatible with the standard 8051 instruction system. It performs three times faster than the 8051, so it can operate at low frequencies to reduce power consumption and noise. In order to reduce interference, its analog power supply and digital power supply are separately powered. Because the integration degree of the chip makes the hardware circuit of the intelligent fetal monitoring system simple, the circuit design is more concise, and the peripheral components of the chip are very few, so that the reliability of the system is greatly improved, and the development cycle is greatly shortened and the development cycle is shortened. Development costs. The MSC1210 interface circuit principle is shown in Figure 4. The Doppler fetal heart rate signal and the contraction pressure signal are input through IN0 and IN2, and then sent to the buffer through the multiplexer, and the variable gain amplifier amplifies the input signal. The fetal movement signal was interrupted by the MSC 1210. The MSC1210 receives the control commands issued by the computer via the RS485 bus, and controls the voice chip to complete the voice reminder function through the P2 port, and controls the sound oscillator through the P1.7 to complete the automatic fetal wake-up function. Using MSC1210 as a microprocessor, it is more accurate and real-time to obtain fetal monitoring indicators, which provides guarantee for intelligent control.
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